Arista 7800R3 Series

Cloud-scale modular spine chassis scaling to 460 Tbps and 576x 400G with a fully scheduled lossless fabric for the largest data center and cloud networks.

Ports: Up to 144x 400G or 576x 100G (4-slot, line card dependent) | Up to 288x 400G or 1,152x 100G (8-slot, line card dependent) | Up to 432x 400G or 1,728x 100G (12-slot, line card dependent) Capacity: 115 Tbps / 24 Bpps | 230 Tbps / 48 Bpps | 345 Tbps / 72 Bpps Pps: 24 Bpps | 48 Bpps | 72 Bpps Form Factor: 4-slot modular, 10RU | 8-slot modular, 16RU | 12-slot modular, 23RU Latency: < 4 µs (64 bytes)

Arista Products

Arista 7800R3 Series

Arista 7800R3 Series
Up to 144x 400G or 576x 100G (4-slot, line card dependent), 115 Tbps / 24 Bpps, < 4 µs (64 bytes) latency

DCS-7804
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Arista 7800R3 Series
Up to 288x 400G or 1,152x 100G (8-slot, line card dependent), 230 Tbps / 48 Bpps, < 4 µs (64 bytes) latency

DCS-7808
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Arista 7800R3 Series
Up to 432x 400G or 1,728x 100G (12-slot, line card dependent), 345 Tbps / 72 Bpps, < 4 µs (64 bytes) latency

DCS-7812
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Arista 7800R3 Series
Up to 576x 400G or 2,304x 100G (16-slot, line card dependent), 460 Tbps / 96 Bpps, < 4 µs (64 bytes) latency

DCS-7816
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Arista 7800R3 Series
Up to 576x 400G or 2,304x 100G (16-slot low-power, line card dependent), 460 Tbps / 96 Bpps, < 4 µs (64 bytes) latency

DCS-7816L
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The Arista 7800R3 Series is a modular spine switch platform in 4-slot (7804R3) and 8-slot (7808R3) chassis, delivering up to 576 Tbps of aggregate switching capacity. The platform positions between the 7500R3 switch router (optimised for deep routing tables and MPLS at the core) and the 7358X4 AI fabric modular chassis (optimised for lossless Ethernet and RoCE), occupying the cloud-scale spine role in traditional three-tier data-centre networks and in hybrid cloud environments where spine switches carry significant route scale but do not require full internet table depth. Line card options include 36x QSFP28 100G (7800R3-36CQ-LC) and 36x QSFP-DD 400G (7800R3-36DD-LC).

Hardware forwarding tables accommodate 256K IPv4 LPM routes, 128K IPv6 LPM routes, 512K IPv4 host routes, 128K MAC addresses, and 128-way ECMP with 4K groups, providing datacenter-scale route and MAC table capacity without the additional complexity of service-provider-class route-scale hardware. Dual hot-swappable supervisors (7800R3-SUP) maintain routing adjacencies through control-plane failover, with N+1 hot-swappable power supplies (2400W or 3000W AC) and front-to-rear or rear-to-front airflow options covering both standard IT and raised-floor data-centre deployments.

4- and 8-Slot Spine Chassis

The 7804R3 (4-slot, up to 288 Tbps) and 7808R3 (8-slot, up to 576 Tbps) share the same supervisor module, line cards, and EOS software, allowing organisations to right-size the spine chassis to current port requirements while maintaining a common operations workflow. The 8-slot chassis provides double the capacity of the 4-slot in the same form factor with only the chassis and additional power modules requiring replacement, not the supervisor or line cards.

Mixed 100G and 400G Line Cards

The 7800R3-36CQ-LC (100G) and 7800R3-36DD-LC (400G) line cards can be mixed within the same chassis, allowing a gradual transition from 100G leaf uplinks to 400G leaf uplinks without replacing the spine chassis. New 400G pods attach via 400G line-card slots while existing 100G pods remain connected via 100G slots, all sharing a unified routing and switching table managed by the same supervisor.

512K IPv4 Host Routes for Cloud Fabrics

A 512K IPv4 host-route table supports cloud-native fabric environments where each virtual machine, container, or microservice endpoint generates its own /32 host route into the spine routing table. This capacity allows scaling cloud-native workloads without address summarisation, simplifying policy enforcement and traffic engineering at the VM or container level across the spine layer.

128-Way ECMP for Load Balancing

One hundred and twenty-eight-way ECMP across 4K groups ensures effective load distribution across all available uplinks from each spine, preventing hot-spot congestion when a subset of paths becomes temporarily more heavily loaded. The ECMP implementation uses hardware-based hashing at line rate across all 400G ports simultaneously, with no per-flow state overhead that would limit scalability as the number of active flows increases.